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DIGITAL ELECTRONICS OBJECTIVE QUESTIONS-4


DIGITAL ELECTRONICS MULTIPLE CHOICE QUESTIONS-PART-4

101. Digital technologies being used now-a-days are
a. DTL and EMOS
b. TTL, ECL, CMOS and RTL
c. TTL, ECL and CMOS
d. TTL, ECL, CMOS and DTL

102. A TTL circuit with totem pole output has
a. high output impedance
b. low output impedance
c. very high output impedance
d. any of above

103. TTL uses
a. multi emitter transistors
b. multi collector transistors
c. multi base transistors
d. multi emitter or collector transistors

104. Advanced schottky is a part of
a. ECL family
b. CMOS family
c. TTL family
d. none of above

105. For wired AND connection we should use
a. TTL gates with active pull up
b. TTL gates with open collector
c. TTL gates without active pull up and with open collector
d. any of above

106. Time delay of a TTL family is about
a. 180ns
b. 50ns
c. 18ns
d. 3 ns

107. As compared to TTL, ECL has
a. lower power dissipation
b. lower propagation delay
c. higher propagation delay
d. higher noise margin

108. As compared to TTL, CMOS logic has
a. higher speed of operation
b. higher power dissipation
c. smaller physical size
d. all of above

109. 74HCT00 series is
a.NAND IC
b. interface between TTL and CMOS
c. inverting IC
d. NOR IC

110.CD 4010 is a
a. inverting buffer
b. non inverting hex buffer
c. NOR IC
d. NAND IC

111. Current requirement of a piezo buffer is about
a. 100mA
b. 20mA
c. 4 mA
d. 0.4 mA

112. TSL inverter has
a. one input
b. two inputs
c. one or two inputs
d. three inputs

113. Parallel adder is
a. sequential circuits
b. combinational circuits
c. either sequential or combinational circuits
d. none of above

114. The inputs to a 3 bit binary adder are 1112 and 1102. The output will be
a.101
b.1101
c.1111
d.1110

115. A half adder can be used only for adding
a. 1s
b. 2s
c. 4s
d. 8s

116. A 3 bit binary adder should be
a. 3 full adders
b. 2 full adders and 1 half adder
c. 1 full adder and 2 half adder
d. 3 half adders

117. when two 4 bit parallel adders are cascaded we get
a. 4 bit parallel adder
b. 8 bit parallel adder
c. 16 bit parallel adder
d. none of above

118. The widely used binary multiplication method is
a. repeated addition
b. add and shift
c. shift and add
d. any of above

119.When microprocessor processes both positive and negative numbers, the representation used is
a. 1’s complement
b. 2’s complement
c. signed binary
d. any of above

120. Decimal -90 =………….in 8 bit 2s complement
a.1000 1000
b.1010 0110
c.1100 1100
d.0101 0101

121. In 2’s complement addition, the carry generated in the last stage is
a. added to LSB
b. neglected
c. added to bit next to MSB
d. added to the bit next to LSB

122. The number of inputs and outputs in a full adder are
a. 2 and 1
b. 2 and 2
c. 3 and 3
d. 3 and 2

123.In a 7 segment display the segments a,c,d,f,g are lit. The decimal number displayed will be
a. 9
b. 5
c. 4
d. 2

124. In a 7 segment display the segments b and c are lit up. The decimal number displayed will be
a. 9
b. 7
c. 3
d. 1

125 .A device which converts BCD to seven segments is called
a. encoder
b. decoder
c. multiplexer
d. none of these

126. Which device use the nematic fluid
a. LED
b. LCD
c. VF display
d. none of these

127. Which of these is the most recent device

a. LED
b. LCD
c. VF display
d. a and c

128. VF glows with ………. Colour when activated
a. red
b. orange
c. bluish green
d. none of these

129. Which display device resembles vacuum tube
a. LED
b. LCD
c. VF
d. none of these

130.Which device changes parallel data to serial data
a. decoder
b. multiplexer
c. demultiplexer
d. flip flop

131.A 1 of 4 multiplexer requires…… data select line
a. 1
b. 2
c. 3
d. 4

132. It is desired to route data from many registers to one register. The device needed is
a. decoder
b. multiplexer
c. demultiplexer
d. counter

133.Which device has one input and many outputs
a. flip flop
b. multiplexer
c. demultiplexer
d. counter

134.Two 16:1 and one 2:1 multiplexers can be connected to form a
a. 16:1 multiplexer
b. 32:1 multiplexer
c. 64:1 multiplexer
d. 8:1 multiplexer

135. A flip flop is a
a. combinational circuit
b. memory element
c. arithmetic element
d. memory or arithmetic

136. I n a D latch
a. data bit D is fed to S input and D’ to R input
b. data bit D is fed to R input and D’ to S input
c. data bit D is fed to both R and S inputs
d. data bit D’ is not fed to any input

137. I n a D latch
a. a high D sets the latch and low D resets it
b. a low D sets the latch and high D resets it
c. race can occur
d. none of above

138.In a positive edge triggered JK flip flop

a. High J and High K produce inactive state
b. Low J and High K produce inactive state
c. High J and Low K produce inactive state
d. Low J and Low K produce inactive state

139.In a positive edge triggered D flip flop
a. D input is called direct set
b.Preset is called direct reset
c. present and clear are called direct set and reset respectively
d. D input overrides other inputs

140. In a positive edge triggered JK flip flop
J=1,K=0 and clock pulse is rising.Q will
a. be 0
b. be 1
c. show no change
d. toggle

141. For edge triggering in flip flops manufacturers use
a. RC circuit
b. direct coupled design
c. either RC circuit or direct coupled design
d. none of these

142. In a JK flip flop toggle means
a. set Q=1 and Q’=0
b. set Q=0 and Q’=1
c. change the output to the opposite state
d. no change in input

143. A mod 4 counter will count
a. from 0 to 4
b. from 0 to 3
c. from any number n to n+4
d. none of above

144.A counter has N flip flops. The total number of states are
a. N
b. 2N
c. 2N
d. 4N

145.A counter has modulus of 10. The number of flip flops are
a. 10
b. 5
c. 4
d. 3

146.In a ripple counter
a. whenever a flip flop sets to 1,the next higher FF toggles
b. whenever a flip flop sets to 0,the next higher FF remains unchanged
c. whenever a flip flop sets to 1,the next higher FF faces race condition
d. whenever a flip flop sets to 0,the next higher FF faces race cond

147.A counter has 4 flip flops.It divides the input frequency by
a.4
b. 2
c. 8
d. 16

148. A decade counter skips
a. binary states 1000 to 1111
b. binary states 0000 to 0011
c. binary states 1010 to 1111
d. binary states 1111 and higher

149.The number of flip flops needed for Mod 7 counter are
a. 7
b. 5
c. 3
d. 1

150.A presettable counter with 4 flip flops start counting from
a. 0000
b. 1000
c. any number from 0000 to 1111
d. any number from 0000 to 1000
151.A 4 bit down counter can count from
a. 0000 to 1111
b. 1111 to 0000
c. 000 to 111
d. 111 to 000

152. A 3 bit up-down counter can count from
a. 000 to 111
b. 111 to 000
c. 000 to 111 and also from 111 to 000
d. none of above

153.IC counters are
a. synchronous only
b. asynchronous only
c. both synchronous and asynchronous
d. none of above

154. Shifting digits from left to right and vice versa is needed in

a. storing numbers
b. arithmetic operations
c. counting
d. storing and counting

155. The basic storage element in a digital system is
a. flip flop
b. counter
c. multiplexer
d. encoder

156. The simplest register is
a. buffer register
b. shift register
c. controlled buffer register
d. bidirectional register

157. The basic shift register operations are
a. serial in serial out
b. serial in parallel out
c. parallel in serial out
d. all of above

158. A universal shift register can shift

a. from right to left b. from left to right
c. both from right to left and left to right
d. none of above

159. In a shift register, shifting a bit by one bit means
a. division by 2
b. multiplication by 2
c. subtraction by 2
d. any of above

160. An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is
a. 1
b. 2
c. 4
d. 8

Frd’s i collected these questions !!! if any body know the answers for any questions post it in comments i will update the page with answers given by you !!! keep visiting i will upload more questions prepare well!!!

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30 Comments to “DIGITAL ELECTRONICS OBJECTIVE QUESTIONS-4”

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