Code No: 52103/MT
M.Tech. – I Semester Supplementary Examinations,
MICROPROCESSORS & MICRO CONTROLLERS
(Common to Power Electronics & Electric Drives/
Power System Control & Automation/ Electrical Power Systems/
Power & Industrial Drives/ Electrical Power Engineering/ Power
Engineering & Energy Systems/ Power Systems (High Voltage))
Time: 3hours Max. Marks:60
Answer any FIVE questions
All questions carry equal marks
– – –
1. Explain the architecture of 8086 processors with a neat block
2.a) Explain the minimum mode operation of 8086 processor with a
b) Draw the timing diagram for memory write cycle in maximum
mode operation of 8086 processor.
3.a) Explain the stack structure of 8086
b) Explain the following interrupts
i) NMI ii) INTR
4. What are the salient features of 80486 processor Explain its
architecture with a neat block diagram.
5. Explain the various operating modes of 8255 PPI.
6.a) What are the various modes of operation of 8251 USART?
b) Explain FIFO status word of 8279.
7. Explain the architecture of 8051 microcontroller with a neat block
8.a) Write a program for the unsigned addition of numbers found in
internal RAM locations 25h, 26h and 27 h together and put the
result in RAM locations 31h(MSB) & 30h (LSB)
b) Explain the interrupt structure and priorities of interrupts in 8051.