JNTU M.TECH ANALOG IC DESIGN QUESTION PAPERS

JNTU M.TECH QUESTION PAPERS | JNTU QUESTION PAPERS | M.TECH QUESTION PAPERS | MTECH ANALOG IC DESIGN QUESTION PAPERS | M.TECH VLSI QUESTION PAPERS | JNTU M.TECH PAPERS|JNTU M.TECH VLSI SYSTEM DESIGN QUESTION PAPERS


JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. Tech I Semester  Examinations
ANALOG IC DESIGN
(VLSI System Design)


SEPTEMBER-2009 PAPER–SUPPLEMENTARY

1.a]  Why is emitter resistor RE replaced by a constant current bias circuit in differential amplifier stage of an op-AMP?
b]  Design the dual input balanced output differential amplifier with the current mirror bias (shown below) according to the following specifications:
i) Supply voltage  Vs= ±12V
ii)  Maximum output voltage swing – 6Vpp.

2.a]  Briefly explain the need for compensating networks in op-Amps.
b]  Explain in detail about advanced current mirror compensating network.

3.a]  What is a comparator? List the important characteristics of the comparator.
b]  Explain different types of comparators with neat circuit diagrams.

4.a]  Explain about CMOS sample and Hold circuit with neat waveforms.
b]  Design a second order Butterworth low pass filter with a cutoff frequency of 500 Hz and a pass band gain of -2. Assume that a  5V ±  power supply and a CMOS clock are used. [Using MF5].

5.a]  Give the procedure of design of  Biquard switched capacitor filter. [ filter is a low pass filter].
b]  Explain the operation of switched capacitor gain circuit.

6.a]  What is difference between A/D and D/A converters? Give one application of each.
b]  Draw and explain the Nyquist rate D/A converter using binary sealed converter.

7.a]  Compare the performance of different types of D/A converters?
b]  Define the resolution, settling time and conversion time of D/A converters.
c]  Explain  the  operation  of  cycle  flash type A/D converter with a neat circuit diagram.

8.a]  Write the differences b/w continuous time and discrete time filters.
b]  Explain in detail about digital decimation filter.


MARCH-2009-PAPER–(REGULAR)

1.a)  Deduce the small signal model for an n-channel MOSFET taking into account the body effect.
b)  Justify the choice of pmos loads.

MTECH ANALOG IC DESIGN PAPER1

3.a)  State the limitations of single stage amplifiers.
b)  Explain in detail the design and operation of cascade current mirror. Identify the limitations and suggest remedies.

4.a)  Deduce the necessary condition that ensures zero input-offset voltage for a 2 stage OP amp.
b)  Discuss the trade offs involved in selecting the input stage as p-channel or n-channel with respect to a 2 stage OP amp.

5.  Discuss in detail the compensation of OP amp that makes it completely independent of process and temperature variations.

6.a)  Discuss in detail the design features of fully differential folded cascade op amp.
b)  Give an account of charge injection errors in connection with comparators and suggest a method to minimize the same.

7.a)  Explain the following in the context of data converters:
i)  Resolution
ii)  Offset and gain error
iii)  Accuracy
iv)  Differential non linearity error
v)  Monotonicity
b)  Explain briefly a 3 bit flash A/D converter. State the salient issues in designing flash A/D converters.

8.a)  Show that the dynamic range can be increased by over sampling.
b)  Discuss the stability and linearity issues associated with delta sigma converters.


MARCH-2008 PAPER-(REGULAR)

1.a)  Explain large signal modelling of single stage BJT amplifier with neat sketches.
b)  Explain common source amplifier with current mirror active load.

2.a)  Explain the effect of negative feedback on the frequency response of OP-AMP.
b)  Explain about cascode (or) CE-CB operational amplifier and obtain AC analysis of it.

3.a)  Explain about charge injection error.
b)  With a neat circuit diagram explain Bi-CMOS comparator.
c)  Write the comparisons between Latched and Bi-CMOS comparators.

4.a)  What is a switched capacitor filter? List important features of it. How does it differ from an analog filter?
b)  Explain the operation of Bimos sample and Hold circuit with neat waveforms.

5.a)  Explain the operation of switched capacitor circuit with neat waveforms.
b)  Briefly explain correlated double sampling techniques.

6.a)  What is Quantization Noise? Explain in detail.
b)  Explain the operation at D/A converters using Hybrid converter.

7.a)  What are the performance limitations of converters?
b)  Compare different types of A/D converters.
c)  Explain Successive Approximation A/D converter with a neat circuit diagram.

8.a)  What is over sampling? Explain over sampling with and without noise sampling.
b)  Explain in detail about Band pass over sampling converter.


FEBRUARY-2007 PAPER

MTECH ANALOG IC DESIGN PAPER22.a)  Draw the circuit of CMOS current mirror and explain its working principle.
b) Explain why source/emitter follower circuits exhibits large amounts of overshoot and ringing.

3.a)  What are the ways of improving slew rate of 2-stage CMOS opamp? And derive an expression for slew rate of CMOS opamp.
b)  Explain about various OPAMP compensation techniques.

4.a)  What is CMFB circuit? What are various methods of designing CMFB circuits? And compare them.
b)  Explain the principle of continuous time CMFB circuit.

5.a)  Briefly explain about various performance parameters of sample-and-hold circuit.
b)  Draw the circuit of switched capacitor circuit and explain its principle.

6.a)  Compare and contrast CMOS and BICMOS sample and hold circuits and their performance.
b)  Define the terms as referred to converters:
i)  offset and gain error
ii) INL error
iii) DNL error
iv)  Sampling time uncertainty.

7.a)  Prove that the sinusoidal signal has 1.76dB more power than a random signal which is uniformly distributed.
b)  Explain the principle of operation of dual slope A/D converter.

8.a)  What are the advantages of 1-bit D/A converters?
b)  Derive the component values of 1st order continuous time filter.


SEPTEMBER-2008 PAPER–(SUPPLEMENTARY)

1.a)  Derive an expression for gm of an N-channel MOS FET operating in linear and saturation regions.
b)  Give the relative performance of CS, CG, CD amplifiers.

MTECH ANALOG IC DESIGN PAPER3

3.a)  State the limitations of single stage amplifiers.
b)  Explain in detail the design and operation of Wilson current mirror.

4.a)  Deduce the necessary condition that ensures zero input-offset voltage for a 2 stage OP amp.
b)  Discuss the trade offs involved in selecting the input stage as p-channel or n-channel with respect to a 2 stage OP amp.

5.)  Discuss in detail the compensation of OP amp that makes it completely independent of process and temperature variations.

6.a)  Give the significance of CMFB circuits.
b)  Give an account of charge injection errors in connection with comparators and suggest a method to minimize the same.

7.a)  Explain the following in the context of data converters:
i) Resolution
ii)  Offset and gain error
iii) Accuracy
iv)  Integral non linearity error
v) Missing codes
b)  Explain briefly a 3 bit flash A/D converter. State the salient issues in designing Flash A/D converters.

8.a)  Discuss in detail the nois shaped delta sigma modulator.
b)  Write an account of band pass over sampling converters.


JNTU M.TECH QUESTION PAPERS | JNTU QUESTION PAPERS | M.TECH QUESTION PAPERS | MTECH ANALOG IC DESIGN QUESTION PAPERS | M.TECH VLSI QUESTION PAPERS | JNTU M.TECH PAPERS|JNTU M.TECH VLSI SYSTEM DESIGN QUESTION PAPERS

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5 Comments

  1. sir,As I am fresher(no specific guidance) I need M.tech VLSI 1st sem question papers and related materials to respective subjects given below:
    1.VLSI TECHNOLOGIES
    2.ANALOG IC DESIGN
    3.DIGITAL IC DESIGN
    4.HARDWARE DESCRIPTION LANGUAGES
    5.HARDWARE & SOFTWARE CO-DESIGN
    6.EMBEDDED SYSTEM CONCEPTS

    pls reply sir
    thank you

  2. excellent this type of advatage to m.tech students
    i thanks to you to provide this type of help

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